The Memory Bottleneck

Gridizer Research
June 2026
Research Track: AI Infrastructure / Semiconductors / Capital Flows

The artificial-intelligence boom is usually described through model quality, Nvidia GPUs, hyperscaler capital expenditure and data-centre construction. Beneath that visible AI race sits a smaller, more concentrated market: high-bandwidth memory.

For commercially relevant, high-volume HBM used in leading AI accelerators, the market is effectively controlled by three companies: SK hynix, Samsung Electronics and Micron Technology.

That does not mean no other company can make memory. It means that only these three currently combine leading-edge DRAM manufacturing, high-volume 3D stacking, yield control, advanced testing and customer qualification at the scale required by the AI infrastructure buildout.

HBM has therefore become one of the most important physical bottlenecks in the modern technology stack. The AI race is not only about who designs the best model. It is also about who can supply the memory, packaging, power and industrial infrastructure needed to make that model run.

HBM is not ordinary RAM

Conventional computer memory sits on separate modules on a motherboard. Data travels across a relatively long electrical path between processor and memory.

HBM works differently. High-bandwidth memory is built from multiple layers of DRAM stacked vertically. These layers are connected through microscopic vertical channels in the silicon and placed extremely close to the GPU, AI accelerator or custom ASIC.

Conventional memory is a set of roads connecting a warehouse to a factory.
HBM is a multi-lane high-speed interchange built directly beside the factory floor.

That physical proximity matters. Modern AI chips contain vast numbers of processing units. They can perform enormous amounts of calculation, but only if data reaches them fast enough. If memory bandwidth is insufficient, expensive GPUs and AI accelerators spend part of their time waiting for data instead of computing.

HBM reduces that problem by moving much more data across a much wider interface. Micron’s HBM4, for example, uses a 2,048-bit interface and is specified for more than 2.8 terabytes per second of bandwidth per stack. Samsung has announced HBM4 specifications of up to 3.3 terabytes per second. The exact figures differ by product, speed grade and system design, but the direction is clear: HBM4 is designed to move dramatically more data than earlier HBM generations.

For AI systems, this is not a minor optimisation. It affects training speed, inference throughput, model size, context-window capacity, energy efficiency, rack density, total cost of compute and utilisation of expensive accelerator silicon.

A GPU without enough memory bandwidth is like a Formula 1 engine connected to a narrow fuel line.

Why only three companies can supply leading AI HBM

Producing HBM is much harder than producing ordinary DRAM. A viable HBM supplier must combine leading-edge DRAM process technology, extremely thin memory dies, reliable vertical silicon connections, multi-layer stacking, thermal management, very high manufacturing yield, precision testing, advanced package integration, long customer qualification cycles and predictable high-volume delivery.

The yield problem is especially important. HBM stacks contain many memory layers. A weak or defective layer can impair the performance or reliability of the entire stack. HBM economics are therefore not simply determined by wafer output. They depend on the percentage of complex stacked products that pass qualification at the required performance level.

This is why HBM cannot be treated like a normal commodity memory product. A new entrant cannot simply announce an HBM programme and meaningfully challenge SK hynix, Samsung or Micron in the next quarter. It needs years of accumulated process knowledge, stacking expertise, packaging access, customer validation and yield learning.

The barrier is not merely intellectual property. The barrier is industrial execution.

The AI system is only as strong as its bottleneck

The visible AI narrative often begins with Nvidia, AMD, cloud platforms or large language models. The industrial chain begins earlier.

AI demand → accelerator design → leading-edge logic dies → HBM stacks → advanced packaging and interposers → substrates and testing → servers and networking → cooling, power systems and grid capacity.

HBM sits directly in the middle of this chain. A company can have GPU dies, customer orders, server demand and capital available. But if qualified HBM stacks are unavailable, or if advanced packaging cannot integrate the memory and logic chips at scale, complete accelerator modules cannot ship in the desired volume.

That is why the HBM market matters far beyond the memory industry. It can become a hard ceiling on AI hardware deployment.

The second bottleneck is advanced packaging. HBM does not operate as a standalone product. It must be integrated with the GPU or ASIC through complex advanced packaging. TSMC’s CoWoS platform is one of the most important examples of this layer: it enables high-performance logic chips and multiple HBM stacks to be connected in a single advanced package.

The real constraint is not simply: Can the world make enough GPUs?
It is: Can the world simultaneously make enough qualified HBM, packaging capacity, substrates, power infrastructure, cooling systems and deployable data-centre capacity?

The competitive map: SK hynix, Samsung and Micron

SK hynix: the HBM incumbent

SK hynix is the strongest current incumbent in the HBM market. Its long investment cycle through HBM2, HBM3 and HBM3E gave it an operational lead in a market where experience compounds. It has built process knowledge not only in DRAM production, but also in stacking, yield management, customer qualification and supply reliability.

In 2026, SK hynix remains central to the transition from HBM3E toward HBM4. HBM3E is still important for current AI accelerators and custom ASIC systems, while HBM4 is becoming the memory platform for the next generation of AI infrastructure. SK hynix has also begun sending HBM4E samples to major customers, showing that the competitive race is already moving beyond the first HBM4 ramp.

A supplier that is late for one memory generation can lose years of customer momentum.

Samsung: the scale challenger

Samsung has the broadest overall memory-industrial base of the three companies. Its advantage is scale: DRAM production capacity, foundry capabilities, packaging knowledge, customer relationships and financial resources. But scale alone is not enough in HBM. The company still needs to prove yields, reliability and qualification at the frontier of each generation.

Samsung has announced commercial HBM4 shipments and has begun positioning itself more aggressively in next-generation AI memory. It has also reached an agreement with AMD to align on primary HBM4 supply for AMD’s next-generation MI455X AI accelerator.

HBM supplier relationships are not interchangeable in the way normal commodity-memory purchases can be. Once a supplier’s HBM is deeply integrated, validated and optimised for an accelerator platform, it gains a much stronger position in the customer ecosystem.

Micron: the US-listed HBM lever

Micron is the third global supplier, but it has a special strategic position. It is the only major US-headquartered memory producer in the HBM triopoly. That matters at a time when the semiconductor supply chain is increasingly shaped by export controls, industrial policy, geopolitical blocs and customer concerns about resilient supply.

Micron began high-volume shipment of its 36GB 12-high HBM4 product in the first quarter of calendar 2026, designed for Nvidia’s Vera Rubin platform. That gives Micron a direct position inside the next generation of AI accelerator demand.

For investors, Micron is probably the cleanest listed US-market expression of the HBM theme. But it remains a memory company, and memory companies remain cyclical. A structurally attractive HBM position does not eliminate the risk of future oversupply, margin compression or valuation volatility.

HBM is creating a new memory hierarchy

The AI boom may change more than the high-end accelerator market. HBM is significantly more profitable and strategically important than many lower-value memory products. As SK hynix, Samsung and Micron allocate wafer capacity, engineering effort and packaging capacity toward HBM, less capacity may be available for conventional DRAM products.

AI demand rises → HBM demand rises → memory producers prioritise HBM → conventional DRAM supply becomes tighter → server, PC and mobile-memory prices rise → memory producers gain pricing power → device makers face higher input costs.

This does not mean every memory supplier becomes a winner. But it does mean that AI demand can spread into broader memory markets. The result may be a more powerful version of the traditional memory cycle: HBM tightness, higher-value product mix, tighter conventional DRAM supply, rising contract prices, stronger margins, higher capital expenditure and eventual risk of over-expansion.

Memory has historically been one of the most cyclical industries in technology. Scarcity can create extraordinary margins, but it can also attract capital, capacity expansion and eventually oversupply. The HBM story is structurally stronger than a normal memory upcycle. It is still not immune to memory-cycle logic.

Capex sellers versus capex carriers

The HBM trio belongs to a strategically attractive category: capex sellers and bottleneck owners. They sell an indispensable component into a global infrastructure buildout.

The opposite side of the trade consists of capex carriers: AI labs, cloud platforms, data-centre developers, GPU buyers and companies spending heavily on AI capacity without yet proving durable returns on invested capital.

A hyperscaler may spend tens of billions of dollars on AI infrastructure. But the HBM supplier receives revenue before the final cloud customer proves that the AI service can earn an attractive return on invested capital.

That does not automatically make HBM suppliers better investments. It does mean their position in the value chain is more favourable.

They sit closer to the toll gate.

What could break the thesis?

1. AI capital expenditure slows

If hyperscalers reduce AI spending after an aggressive buildout phase, demand for accelerators and HBM could weaken. This would not destroy the technology, but it could damage the near-term memory cycle.

2. Samsung and Micron close the gap faster than expected

A more competitive three-player market may reduce pricing power for the current leader. The HBM market can remain structurally attractive while the economics for individual suppliers become less extraordinary.

3. Advanced packaging becomes the tighter bottleneck

HBM availability alone does not guarantee accelerator deliveries. If CoWoS-type packaging, substrates or testing capacity remain constrained, HBM producers may not fully capture the expected volume upside.

4. Capacity expansion overshoots demand

The memory industry has repeatedly shown that profitable shortages encourage excessive expansion. New HBM capacity scheduled for 2027 and beyond must be monitored carefully.

5. A credible fourth supplier emerges

China’s memory industry is trying to develop domestic HBM capability. It does not yet represent a broadly qualified global alternative for frontier AI accelerators, but this is the strategic development to monitor over the medium term.

What Gridizer should monitor

The important signals are not merely product announcements. Gridizer should track the physical and financial evidence chain.

Production and technology

• HBM4 and HBM4E yield progression;
• 12-high and 16-high stack qualification;
• power-efficiency improvements;
• customer-specific base-die development;
• shipment volume rather than sample announcements alone;
• production-capacity guidance.

Customer qualification

• Nvidia platform qualification;
• AMD accelerator supply agreements;
• hyperscaler ASIC integration;
• supply contracts;
• customer concentration;
• dual-sourcing decisions.

Packaging and system bottlenecks

• CoWoS capacity;
• advanced substrate availability;
• interposer capacity;
• high-end testing equipment;
• rack-level integration;
• cooling and liquid-cooling requirements;
• data-centre power availability.

Market and financial signals

• HBM contract pricing;
• conventional DRAM pricing;
• inventory trends;
• gross-margin guidance;
• memory-company capital expenditure;
• hyperscaler AI capital-expenditure plans;
• accelerator shipment forecasts;
• evidence of customer order deferrals.

Do not confuse an HBM product announcement with a completed AI supply chain.

The full chain must work: memory, packaging, logic, servers, networking, cooling, electricity and customer demand.

Investment interpretation

Company	Strategic position	Main attraction	Main risk
SK hynix	HBM incumbent and technology leader	Direct exposure to HBM leadership and AI-memory demand	High expectations, memory-cycle risk, competitive share pressure
Samsung	Scale challenger and HBM recovery story	Large industrial base and potential upside from stronger HBM execution	HBM is diluted within a broader conglomerate; qualification execution remains decisive
Micron	US-listed HBM and memory-cycle exposure	Direct HBM ramp, Nvidia-platform relevance, US strategic position	Cyclical earnings, valuation volatility, supply-cycle risk

For a portfolio, these companies are better understood as semiconductor-infrastructure exposures rather than simple AI software bets. They benefit when AI capital expenditure continues, but they must also be reviewed as cyclical memory businesses.

The right question is not merely: Who makes HBM?
The more important question is: Which supplier can preserve yield, qualification, pricing power and customer relevance when new capacity enters the market?

Conclusion: AI has a memory bottleneck

The AI boom is often presented as a battle over models, algorithms and GPUs. But the more durable reality is industrial.

AI requires power, cooling, grids, logic chips, advanced packaging, networking, capital and memory bandwidth. HBM has become one of the most concentrated and strategically important parts of that system.

SK hynix, Samsung and Micron are not simply selling fast RAM. They are supplying a physical input without which the world’s most expensive AI accelerators cannot perform as designed.

That makes high-bandwidth memory one of the clearest picks-and-shovels layers in the AI buildout. It also makes it a market where industrial discipline matters more than hype.

The AI future may be written in software. But it still has to be stored, moved and processed through physical memory.

Research source note

Primary-source verification for this report should prioritise Micron HBM4 product documentation and production announcements; Samsung HBM4 and AMD supply communications; SK hynix HBM product, sample-shipment and quarterly disclosures; and TSMC 3DFabric / CoWoS technical documentation. Market-share, pricing and capacity figures should be cross-checked against independent market data because methodology can differ by revenue, bits, capacity, platform and period.